Figure 1. Test Setup For Measuring Voltage Between the Planes on a Four Layer PCB Model
(Spectrum Analyzer Screen at 10 dB/div Vertically and 100 MHz/div Horizontally)
Abstract: Four layer PCBs are
used in a wide variety of applications. However, usually it is
necessary for some signal paths to be routed on both the top and bottom
signal layers to achieve required routing density. Using a model of a
four layer PCB with ground and power planes, data is presented that
shows routing a signal on both signal layers can cause significant
signal voltage to be developed between the planes unless a simple
design rule is observed.
Discussion: Figure 1 shows the
test setup used to generate data, composed of an Agilent N9340B
spectrum
analyzer and a test board. The test board is copper clad on
both sides and about 50 mils thick. A close-up of the bottom of the
board is shown in Figure 2, before the BNC connector was added in the
middle
of the board. Two paths about 9 inches (~23 cm) in length run from SMA
connectors
to 51 Ohm load resistors. The paths are made from the individual
insulated wires from 100 Ohm twisted pair telephone wire taped down to
the underlying plane, thus forming an approximately 50 Ohm transmission
line. One
path stays on the bottom of the board while the other path runs about
1/3 of its length on the opposite side of the board.
The two planes are shorted together by the SMA connectors and at the load resistors. This simulates four bypass capacitors between the power and ground planes of a four layer PCB. Most four layer PCBs have more than four bypass capacitors, but I wanted to show a limiting case with only four. The results are worst case compared to most four layer PCBs. However, I have seen PCBs that needed additional bypass capacitors. In addition, passive four layer PCBs with no active components, such as a backplane, sometimes have few if any bypass capacitors.
Figure 3 shows a close-up of the top side of the test board. A BNC board mount connector has been soldered down to the top plane (and surrounded by copper tape to insure a good 360 degree contact from the plane to the connector). The center pin of the connector is soldered to the bottom plane so the signal at the BNC connector is the signal voltage between the planes. This connector is connected to the spectrum analyzer input while the tracking generator output of the analyzer is connected to one or the other of the BNC connectors that the signal paths on the bottom of the board are connected to (right side of Figure 3).
Figure 3. Top Side of Test Board
The two planes are shorted together by the SMA connectors and at the load resistors. This simulates four bypass capacitors between the power and ground planes of a four layer PCB. Most four layer PCBs have more than four bypass capacitors, but I wanted to show a limiting case with only four. The results are worst case compared to most four layer PCBs. However, I have seen PCBs that needed additional bypass capacitors. In addition, passive four layer PCBs with no active components, such as a backplane, sometimes have few if any bypass capacitors.
Figure 2. Bottom Side of Test Board
Figure 3 shows a close-up of the top side of the test board. A BNC board mount connector has been soldered down to the top plane (and surrounded by copper tape to insure a good 360 degree contact from the plane to the connector). The center pin of the connector is soldered to the bottom plane so the signal at the BNC connector is the signal voltage between the planes. This connector is connected to the spectrum analyzer input while the tracking generator output of the analyzer is connected to one or the other of the BNC connectors that the signal paths on the bottom of the board are connected to (right side of Figure 3).
Figure 3. Top Side of Test Board
Figures
4 and 5 show the spectrum analyzer screens that resulted when the
tracking generator was connected to the path that stayed on one side of
the board and the path that was routed on both sides respectively. The
tracking generator was set to its maximum level of 107 dBuV (0 dBm, about 224
mV). Note that the voltage between the planes is much larger for the
path that was routed on both sides, tens of dB higher at most frequencies. At the first peak about 240 MHz, it
is 45 to 50 dB higher.
Figure 4. Measured Voltage Between Planes for Signal That Stays on the Same Side of the Board
(Spectrum Analyzer Screen at 10 dB/div Vertically and 100 MHz/div Horizontally)
(Spectrum Analyzer Screen at 10 dB/div Vertically and 100 MHz/div Horizontally)
Figure 5. Measured Voltage Between Planes for Signal That Routes on Both Sides of the Board
(Spectrum Analyzer Screen at 10 dB/div Vertically and 100 MHz/div Horizontally)
(Spectrum Analyzer Screen at 10 dB/div Vertically and 100 MHz/div Horizontally)
Given that the applied signal was about 107 dBuV (into a 50
Ohm load) and the peak reading between the planes was about 93 dBuV at
240 MHz, the signal between the planes was only 14 dB less than the
applied signal or about 1/5 of the applied signal. This
implies the impedance between the planes must be several Ohms at least in the
region of the center BNC connector at 240 MHz. Remember the planes are shorted
together about 3 inches (1.2 cm) from the "vias" where the signal
passed between the top and bottom of the board.
This is a
limiting case compared with most four layer PCBs (only four "bypass caps"), but could represent a
significant problem for passive backplanes and connecting boards which
may have capacitors widely spaced if any at all. Some time ago I
reviewed the layout of a passive board that connected SCSI signals
between two parts of a system. The SCSI paths came in on the top layer
of a four layer board and exited on the bottom layer on another
connector. I had the person doing the layout add bypass capacitors in
the field of vias of the SCSI signals as they passed from the top layer
to the bottom layer to prevent the effect shown above.Given the above data, one could propose a design rule for four layer boards where a critical signal
(clock, reset, or similar) must pass from the top signal layer to the bottom
signal layer of a four layer board. The via for this signal should be
located near an existing or added bypass capacitor.
Summary:
The use of a model of a four layer PCB shows that significant signal
voltages can be developed between the planes of a four layer board
under some circumstances. A resulting design rule could be to locate
vias of important signals near bypass capacitors on four layer PCBs.
Additional articles on this website related to this topic are:
- April 2006, Routing Signals Between PWB Layers - Part One, An ESD Example
- May 2006, Routing signals Between PWB Layers - Part Two, An Emissions Example
- Agilent N9340B spectrum analyzer
A 10+ minute video that shows
the live experiment pictured in Figure 1 and discusses implications for
system radiated emissions will be posted at http://circuitadvisor.com
in the membership section.
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